ASIC Layout Design Engineer

Job Overview:

• Designs or provides support for the design of, layout for ASICs for multiple R&D projects leveraging the tradeoff between time/cost/quality in order to fulfill customer requirements and expectations as well as industry defined norms and standards;
• Working for analog layout activities for ASIC development;
• In charge to analog block layout and checks like DRC & LVS, you will work closely with our analog designers to make sure the physical implementation is optimized;
• Support the parasitic extraction for post layout simulation;
• Working on the analog block level layout and top-level integration;
• Close collaboration with design team for area estimation and floor planning;
• DRC, LVS and Parasitic extraction;

• Bachelor’s degree in Electronics and Microelectronic or above;
• At least 3 years of professional experience in Analog layout of IC design;
• Good experience on analog layout, DRC, LVS and top-level floor planning . Experience on Mixed-signal design and switching capacitor circuit will be much appreciated;
• Capacity to work independently, to respect deadlines and to handle several projects simultaneously;
• Organized, accurate and structured way of working with focus on quality;
• Energizing and result-oriented; Open minded and intercultural awareness;
• Fluent in English; other language skills would be a plus;