Functional Verification Engineer

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Employer: ALTEN SI-TECHNO Romania
Domain:
  • IT Hardware
  • IT Software
  • Job type: full-time
    Job level: 1 - 5 years of experience
    Location:
  • BUCHAREST
  • Updated at: 27.05.2018
    Short company description

    ALTEN Romania, a subsidiary of ALTEN Group – with a unique position as a European Leader in IT & Engineering Consulting, was established in 2006 in Bucharest, with the aim to provide technical consulting for the customers of this specific market. Since its inception, the company grew and now has offices in Bucharest, Timisoara, Sibiu and Cluj-Napoca.
    Through its team of over 300 specialists in software development, business analysis, business intelligence, PMO, Project Management, testing, technical support, automotive and aerospace engineering, ALTEN Romania is providing specialized services, both on the local and international markets in business sectors such as: aerospace, automotive, finances, pharmaceutics and telecom.
    ALTEN Romania has a technical team of consultants and experts in engineering specialized in CATIA V5, NewPDM, SolidWorks, Matlab/Simulink, HIL, Autosar and others, while the IT Division has precise specializations like: Java, .NET, PHP, C#, C++, SIEBEL, Informatica PowerCenter, Cognos, MS BI and Oracle BI, BSCS and more.

    Requirements

    • A Master’s degree or/and a Bachelor’s degree in Electrical/Electronic Engineering or equivalent.
    • 3-4 years’ experience in verification environment (is a MUST!)
    • Proven experience within a High Level Verification Language (System Verilog/Specman).
    • Good understanding of Verilog/VHDL and the ability to debug digital circuits on RTL and gate level.
    • Knowledge of Object Oriented Programming.
    • Knowledge of a scripting language (e.g. TCL, bash, perl, Python).
    • Good command of English Language.

    Responsibilities

    • Review functional specifications and define the verification strategy (e.g. verification plan and verification environment architecture) based on the HW specification.
    • Build the verification environment following the verification methodologies (i.e. UVM, eRM).
    • Implement the verification model of the DUT and the verification components for driving, monitoring and checking different digital modules, at SOC level and mixed signal testing.
    • Develop test scenarios and functional coverage based on the verification plan.
    • Create and support innovative ideas in your field of knowledge collaboratively and have measurable impact on working results on a local basis and within organizational area.
    • Contribute to success and give technical guidance in the project / team.
    • Share knowledge within project / team and demonstrate active knowledge transfer and best practice sharing.