Layout Engineer

Employer: ON Semiconductor
Domain:
  • Engineering
  • Job type: full-time
    Job level: 1 - 5 years of experience
    Location:
  • BUCHAREST
  • nationwide
    Updated at: 01.12.2020
    Short company description

    ON Semiconductor is committed to providing career advancement and development opportunities. Our employees are crucial to the success of our company - it is important for us to provide global programs that recognize, develop and enable our employees to grow. Our career development philosophy is that employees own their careers by leveraging the programs, tools and resources available to them.

    Requirements

    • Bachelor or Master Degree in Electrical Engineering.
    • Familiarity with analog matching requirements and practices
    • Expertise on Cadence virtuoso custom/analog layout platform
    • Knowledge of layout techniques for device matching and minimized parasitic
    • Working knowledge on various analog and mixed-signal IP blocks such as bandgaps, regulators, current mirrors.
    • Experience implementing analog layouts to achieve tight matching, low noise, and low power consumption. Layouts may include analog blocks, resistors, and capacitors, pad IOs, ESD structures, etc.
    • Good understanding of layout extractions, verification methods which includes LVS, DRC and ERC checks on leading foundry flows.
    • Communicate with design engineers to negotiate any necessary layout trade-offs as needed to build complex analog layout.
    • Ability to work with circuit designers that are located remotely. As a result, solid documentation and communication skills are required.
    • Familiar with the following tools: Cadence, Mentor and Synopsis tool suites including schematic capture, Hspice/Spectre and HspiceRF/SpectreRF, Nanosim or XA, Verilog-A/AMS, LVS/DRC verification. Shell scripting and programming experience are highly desirable.
    • High level of proficiency in custom and standard cell based floor-planning and hierarchical layout assembly.
    • Excellent written and oral English communication skills and ability to work with global teams.

    Responsibilities

    The Design Layout Engineer will be responsible for the development of gate driver ICs that serve automotive, industrial and white goods markets over a wide variety of power ranges. This individual will multi-task between layout design and packaging to help define IP and processes, thus enabling successful products.
    • Individual contributor in the design team to create innovative high voltage gate driver layout.
    • Timely execution of development efforts by way of robust layout design.
    • Ability to estimate layout schedule for a given circuit, layout planning and provide early feedback to circuit design engineers etc.
    • Works on problems of moderate scope where analysis of situations or data requires a review of identifiable factors.
    • Develop and maintain the skillset and system knowledge relevant to the product line.
    • Communicate with design engineers to negotiate any necessary layout trade-offs as needed to build complex analog layout.

    Other info

    • A variety of ways for your professional and personal development. We pay attention to education and personal development of our employees. We will tailor your individual training plan to your needs.
    • We offer space for your creativity. We are encouraging initiatives, ideas and solutions. You will have the opportunity to develop and be part of interesting international projects.
    • Entertainment turns into work. You can look forward to private health care services, dental services, meal vouchers, annual celebration, team activities and a great coffee.
    • Stability and good atmosphere. We score high in employee satisfaction surveys.
    • Flexible Schedule. Work in a way that suits you by having flexible start and finish time.