Digital IC Verification Engineer
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Our applications address the main domains where Siemens is active: Electrification, Automatization and Digitalization.
- Contributions to verification strategy definition
- Verification planning
- Implementation of complex verification environments and verification components
- Simulation-based and/or Formal Verification
- Debug, analysis and verification closure
- Improvements of the verification flow, techniques and methodologies
- BSc/MSc/PhD degree in Electrical Engineering/Automation/ Computer Science
- 3-5 (mid-level) or 5+ (senior level) years of relevant experience in Digital IC Design/Verification
- Experience in verification of complex SoC/ASIC/FPGA designs
- Experience using verification methodologies eRM/VMM/OVM/UVM and languages VHDL/Verilog/ SystemVerilog/e (experience in Formal Verification is a plus)
- Good understanding of OOP (algorithms modeling using C/C++/SystemC/Matlab is a plus)
- Proficiency in Linux environments and scripting languages (Perl/Python/Tcl/sh)
- Strong knowledge of computer architectures, interfaces, protocols (experience in implementation/verification of multi-core SoCs is a plus)
- Team player, aim for a high quality standard, like challenges, open to learn new things, desire for self-improvement and innovations
- Proficiency in English (German language is a plus)
We are Siemens, a collection of great minds who are all making the future. Part of Siemens Corporate Technology division, our team is focused on R&D activities for next generation of Siemens’s products using latest technologies, methodologies and tools. You could be one of us!